Direct current tachometer system

ABSTRACT

A direct current tachometer system provides a DC output signal having a magnitude which varies with the tachometer speed. Reference pulses are generated exhibiting a frequency proportional to tachometer speed. A control circuit serves to vary the magnitude of the DC output signal in dependence upon the frequency of the reference pulses.

O United States Patent 1 [111 3,764,888 Anderson Oct. 9, 1973 DIRECTCURRENT TACHOMETER [56] References Cited SYSTEM UNITED STATES PATENTS[75] Inventor: Dennis R, Anderson, warensville 3,084,307 4/1963 Landis324/161 X Hgts Ohi 3,121,836 2/1964 Rosenberry.... 322/24 3,215,91811/1965 Lichowsky 1 318/328 X Asslgneel Avtron Manufacturing n-,3,218,538 11/1965 Sear 318/328 x Cleveland, Ohio 3,581,561 6/1971Tomashek et al 324/161 UX [22] Filed: 1972 Primary Examiner-J. D. Miller[21] Appl. No.: 283,275 Assistant Examiner-H. Huberfeld Related 1.1.5.Application Data Attorney-Robert Sundhe'm [63] (ontinuution-in-part ofSer. No. 210,715, Dec. 22, [57] ABSTRACT I971, abandoned.

A d1rect current tachometer system provides a DC [52] Us Cl 322/20318/314 318/318 output signal having a magnitude which varies with .3 l322/2 8 322/3 324 the tachometer speed. Reference pulses are generated[51] Int Cl H02p 9/00 exhibiting a frequency proportional to tachometer[58] Fie'ld 24 28 29 speed. A control circuit serves to vary themagnitude of the DC output signal in dependence upon the frequency ofthe reference pulses.

22 Claims, 5 Drawing Figures THRfE PHASE F 0L1. WAVE REC T/F/ER PHASECOMPARATOR rELEScoP/NG I A/TEGRA 70/? 2 LOAD #2 KEGUZA TOR COMPARA 70R.

DIRECT CURRENT TACHOMETER SYSTEM This is a continuation-in-part of mycopending US. application Ser. No. 210,715, filed on Dec. 22, 1971, andnow abandoned and assigned to the same assignee as this application.

This invention relates to the art of tachometer systems and, moreparticularly, to a tachometer generator having circuitry for providing aregulated DC output signal.

The invention is particularly applicable for use in motor controlapplications; however, it is not limited to same, and may be used invarious applications requiring precisely regulated DC output signals.

Direct current tachometers for directly generating direct current speedsignals are well known. A major disadvantage in using such generators,however, is that substantial brush maintenance is required during thegenerators operating lifetime. For this reason, various proposals havebeen made to provide brushless tachometers, such as an AC generatortogether with suitable rectifying circuitry to provide a DC outputsignal. Such a DC output signal, however, is a rough and unregulatedsignal which is only approximately proportional to shaft speed. Otherproposals have included utilizing a toothed gear wheel mounted on arotating shaft together with a transducer which counts the teeth as theypass so that impulses are counted during each cycle of rotation of therotating shaft. With a fixed number of impulses being associated witheach revolution, the pulse frequency may be translated into a DC signalrepresentative of shaft speed. However, the accureacy of such systems isinherently limited by the number of teeth which may be provided on sucha gear wheel, the difficulties in obtaining exact symmetry in gearprofile, and the substantial slow response time to changing shaft speed,particularly at low speeds.

The present invention is directed to an improved tachometer generatorsystem employing a novel control circuitry for purposes of obviating theforegoing disadvantages and others of such previous tachometer systems.

The present invention contemplates the provision of a direct currenttachometer system for providing a DC output signal having a magnitudewhich varies with tachometer speed.

In accordance with one aspect of the present invention, circuitry isprovided for purposes of providing reference pulses exhibiting afrequency proportional to tachometer speed. Further control circuitryserves to vary the magnitude of the DC output signal in dependence uponthe frequency of the reference pulses.

In accordance with a more limited aspect of the present invention, thecontrol circuitry includes active electronic circuits connected toreceive DC operating or bias potentials and a power supply circuitserves to provide the DC operating or bias potentials to all of theactive electronic circuits from the DC output signal obtained from thetachometer generator.

In accordance with a still further aspect of the present invention, thecontrol circuitry includes frequency to voltage conversion means fordeveloping a control signal having a magnitude proportional to thefrequency of the reference pulses for use in varying the magnitude ofthe DC output signal.

In accordance with a still further aspect of the present invention,signal pulses are provided exhibiting a frequency proportional to themagnitude of the DC output signal, and the control circuitry serves tovary the magnitude of the DC output signal in dependence upon thefrequency of the reference pulses and the signal pulses.

In accordance with another aspect of the present invention, the controlcircuitry includes voltage to frequency conversion circuitry to convertthe DC output signal into a train of signal pulses which exhibits afrequency directly related to the magnitude of the DC output signal.

In accordance with a still further aspect of the present invention, apulse generator is provided for monitoring the input shaft of thetachometer generator for purposes of providing a fixed number ofreference pulses during each cycle of rotation of the shaft so as tothereby provide reference pulses which exhibit a frequency proportionalto the tachometer speed.

In accordance with a still further aspect of the present invention, thecontrol circuitry employs a phaselock servo loop control circuit whichserves to continuously adjust the magnitude of the generated DC outputsignal toward that which would result in the reference pulses and thesignal pulses being synchronously related in phase and frequency.

Still further in accordance with the present invention, the phase-lockservo loop control circuit employs a phase comparator for purposes ofproviding an output control signal dependent upon any phase displacementbetween the reference pulses.

Still further in accordance with the present invention, the servo loopcontrol circuit employs integrating circuitry for purposes ofintegrating the output control signal and providing therefrom an errorsignal which is applied to a regulating circuit for purposes of varyingthe magnitude of the DC output signal in dependence upon the errorsignal.

The primary object of the present invention is to provide an improveddirect current tachometer system which exhibits improved reliabilitywith low maintenance requirements.

A still further object of the present invention is to provide animproved direct current tachometer system which employs solid statecontrol circuitry for obtaining improved performance with economicaloperation.

A still further object of the present invention is to provide atachometer generator system having control circuitry which obtainsoperating or bias potentials from the tachometer generator therebyobviating the need for a separate power source.

The foregoing and other objects and advantages of the invention willbecome more readily apparent from the following description of thepreferred embodiment of the invention, taken in conjunction with theaccompanying drawings which are a part hereof and wherein:

FIG. 1 is a schematic-block diagram illustration of the preferredembodiment of the invention;

FIG. 2 is a schematic illustration of a portion of the circuitryemployed in FIG. 1;

FIG. 3 is a block diagram illustrating of the embodiment in FIGS. 1 and2;

FIG. 4 is a schematic block diagram illustration of another embodimentof the invention; and,

FIG. 5 is a schematic block diagram illustration of a still furtherembodiment of the invention.

Referring now to the drawings wherein the showings are for purposes ofillustrating preferred embodiments of the invention only and not forpurposes of limiting the same, FIGS. 1 and 2 illustrate one embodimentof a tachometer system constructed under the present invention and whichincludes a brushless permanent magnet AC generator G having an inputshaft S and a three-phase output circuit connected to a conventionalthree-phase full-wave rectifier circuit R, which provides a DC outputvoltage V having a magnitude dependent upon the angular velocity ofshaft S. Whereas generator G is shown as having a three-phase outputcircuit, it is to be appreciated that a single or two-phase outputcircuit may be employed in accordance with the invention. The DC outputvoltage V is applied to a suitable load L which may take various forms,such as a meter for providing a visual indication as to the angularvelocity of shaft S. The load may also be a motor control circuit which,in accordance with the magnitude of voltage V, serves to control a motorto vary the rotational velocity of the motors output shaft which, inturn, is coupled to shaft S of generator G. The full-wave rectified DCoutput voltage V is a relatively rough and unregulated DC voltage whichis only approximately proportional to the angular velocity of shaft S.The output voltage V, taken from the full-wave rectifier R, is appliedto a voltage regulator VR to obtain a regulated voltage V L which issupplied to load L. The output voltage V is obtained by regulatingvoltage V in dependence upon an error signal voltage V obtained fromcontrol circuitry to be described in greater detail hereinafter.

The output voltage V,, is applied to a voltage-tofrequency converter VFwhich provides signal pulses F exhibiting a frequency proportional tothe magnitude of voltage V, Signal pulses E; are applied to one input ofa phase comparator circuit PC. A pulse generator PG is provided forproviding reference pulses F exhibiting a frequency dependent on theangular velocity of shaft S and these reference pulses are applied tothe second input of the phase comparator PC. The phase comparatorprovides an output control signal V in dependence upon thephase-frequency relationship between signal pulses F and referencepulses F The control signal V is integrated by a telescopingintegrator'circuit Tl, having a variable time constant, to provide theerror signal V The error signal is applied to the voltage regulator VRto vary the magnitude of the direct current output voltage V independence upon the phase-frequency comparison. Thus, a phase-lock servoloop control is provided in that the output voltage V is varied tothereby cause the frequency of the signal pulses F to be varied towardthat of the reference pulses F In this manner, the output voltage V isprecisely regulated in dependence upon the angular velocity of shaft S.

Having briefly described the operation of the tachometer generatorsystem, attention is now directed toward the construction features. Thepulse generator PG may take various forms. However, in the preferredembodiment of the invention, it includes a gear wheel 10 mounted toshaft S for rotation therewith. Gear wheel 10 is provided with radiallyextending gear teeth 12 of equal size and spacing. For example, wheel 10may have 320 teeth to provide 320 pulses for each revolution of shaft S.The pulse generator also includes a transducer T, of the reluctancetype, for purposes of providing one pulse for each tooth passing inclose proximity to the transducer. The pulses are amplified by asuitable amplifier l4 and applied as the reference pulses F as positiveor binary 1 signal level pulses, to one input of the phase comparatorPC.

Whereas the voltage-to-frequency converter VF may take various forms ofanalog-to-frequency converters, it preferably includes an integratorcircuit having an energy storage means in the form of a capacitor 20 connected between the inverting input and the output circuit of aconventional operational amplifier 22. The analog input signal, in thiscase, is the output DC signal V which is applied through a resistor 24to the inverting input or summing point of the operational amplifier.Consequently, the capacitor 20 charges at a rate dependent on themagnitude of voltage signal V The output signal of the operationalamplifier is applied to one input of a conventional comparator 26 whichserves to compare the integrated output signal from the operationalamplifier with a reference, such as ground potential, and when theamplifiers output signal attains a level equal to ground potential, thecomparator provides an output signal pulse. This output signal pulse is,in turn, applied to a fixed time circuit 28, which may take any suitableform, such as a one-shot monostable oscillator, for purposes ofproviding an output signal of a fixed time duration for each signalpulse received from the comparator 26. The output signal taken from thefixed time circuit 28 is used to actuate a suitable switch, such asfield effect transistor 30, for the fixed time duration for purposes ofdischarging capacitor 20. Thus, when the field effect transistor 30 isactuated into conduction, it connects a reference voltage V of oppositepolarity from output voltage V through a resistor 32 so that thecapacitor 20 discharges for the fixed period of time. Thereafter, thecapacitor is then charged at a rate dependent upon the magnitude of theDC output signal V as the cycle repeats itself. The output signal pulsesF obtained from comparator 20 exhibit a frequency which is proportionalto the magnitude of the output signal V These pulses are applied aspositive or binary 1 signal pulses to the second input of the phasecomparator PC for comparison with the signal pulses F PHASE COMPARATORThe phase comparator PC is illustrated in FIG. 2 and serves to comparethe reference pulses F with the signal pulses F Any phase or frequencydifference is sensed by the comparator and an output control signal V isapplied to the telescoping integrator TI to control the magnitude of thedirect current output signal. The phase comparator PC includes a two bitup/down binary counter including a JK flip-flop 50 which is triggered bypositive or binary 1 signal pulses. In a conventional fashion, the JKflip-flop 50 includes two input terminals .l and K, together with twooutput terminals Q and 6, together with a trigger input terminal C. Thetrigger input terminal C is connected to the output circuit of aconventional NAND gate 52 having one of its input circuits connected tothe output circuit of a conventional inverted OR gate 54 and the secondinput circuit being connected to the output circuit of another invertedOR gate 56. As will be apparent from the description herein, theinverted OR gates and the NAND gates function in identical manner. Theinverted OR gates 54 and 56 serve to respectivelyv receive referencepulses F and signal pulses F The output circuits of inverter OR gates 54and 56 are-also respectively applied to one input circuit each ofinverter amplifiers 58 and 60. The second input circuits of the invertedOR gates 54 and 56 are respectively connected to the output circuits ofNAND gates 62 and 64. NAND gate 62 has one input circuit taken fromoutput terminal Q of flip-flop 50, whereas NAND gate 64 has one inputcircuit taken from output terminal 6 of flip-flop 50. The outputterminals Q and O of flip-flop 50 are respectively connected to inputterminals K and J, as well as being respectively connected to one inputcircuit each of inverted OR gates 66 and 68. The output circuits ofinverted OR gates 66 and 68 are respectively connected to one inputcircuit each of NAND gates 70 and 72. These two NAND gates are connectedtogether to define a bistable multivibrator circuit with the outputcircuit of NAND gate 70 serving as the output circuit of the phasecomparator PC and is labeled as output terminal Q In addition, theoutput circuits of NAND gates 70 and 72 are respectively connected toone input each of NAND gates 62 and 64.

As will be described hereinafter in the detailed description ofoperation, output terminal Q of the phase comparator circuit PC willcarry a control signal V in the form of either a binary l or a binarysignal, dependent on the phase-frequency relationship of the signalpulses F and the reference pulses P The control signal V is applied tothe telescoping integrator Tl.

TELESCOPING INTEGRATOR The telescoping integrator Tl serves to receivethe control signal V in the form of either a binary l or a binary 0signal and provides an integrated error signal V,,- for application tothe voltage regulator VR. Whenever the output control signal V to thetelescoping integrator Tl is a binary 1 signal, the integrated outputerror signal v will be a positive going signal which serves, whenapplied to voltage regulator VR, to increase the magnitude of the DCoutput-signal V This condition is indicative that the frequency ofsignal pulses F is less than that of the reference pulses F As the DCoutput voltage V increases in magnitude, the voltage-to-frequencyconverter VF increases the frequency of signal pulses F toward that ofthe frequency of reference pulses F Conversely, if the input controlsignal V applied to the telescoping integrator TI is a binary 0 signal,then the error signal V will be a negative-going signal, causing theoutput signal V to decrease in magnitude and causing the frequency ofsignal pulses P to decrease toward that of the reference pulses F Thetelescoping integrator TI, as shown in FIG. 2, includes an inverteramplifier 80 for receiving the binary l or binary 0 control signal VThis inverter, however, serves to invert a positive or binary 1 signalinto a negative level signal and to invert a binary 0 control signalinto a positive signal. The output of inverter amplifier 80 is appliedthrough a multipying circuit 82 and thence through a resistor 84 to thesumming point of an integrating circuit 86. The integrating circuit 86includes a conventional operational amplifier 88 and an integratingcapacitor 87 connected between the summing point or inverting input ofthe amplifier and the output circuit of the amplifier. The outputcircuit of the amplifier is, in turn, connected to the multipyingcircuit 82 so that the output signal from amplifier 80 is multiplied bythe integrators output signalv This multiplier function serves toprovide a telescoping or varying time constant for the integratingcircuit. This feature will be described in greater detail in thedescription of operation which follows hereinafter.

VOLTAGE REGULATOR The error signal V taken from the output circuit ofthe telescoping integrator TI is applied to the voltage regulator VR.The voltage regulator, as best shown in FIG. 2, is aseries-pass-transistor regulator with current limiting features. Thus,the circuitry employs a pair of NPN transistors and 102 having theiremitters connected in common and then through a resistor 104 to a B-voltage supply source. The base of the transistor 102 is connectedthrough a resistor 106 to the output circuit of the telescopingintegrator TI. The base of the transistor 100 is connected to themidpoint of a voltage divider including series-connected resistors 108and 110 with the opposite end of resistor 108 serving as the output ofthe regulator to provide the regulated DC output signal V The collectorsof transistors 100 and 102 are connected together through a capacitor112. in addition, the collector of transistor 110 is connected through aresistor 114 to the input circuit of the voltage regulator which, inturn, is connected to the output circuit of the three-phase full-waverectifier R. The collector of transistor 102 is connected through a pairof series-connected resistors 116 and 118 to the input circuit and aZener diode 120, poled as shown, is connected across a resistor 118. Thejunction of resistors 116 and 118 is connected to the base of a PNPtransistor 122 having its collector connected to the output circuit ofthe voltage regulator. The emitter of transistor 122 is connected to thebase of another NPN transistor 124 having its collector connected to theoutput circuit of the voltage regulator and its emitter connectedthrough a resistor 126 to the input circuit of regulator VR.

If the output error signal V from the telescloping integrator increasesin a positive direction, then transistor 102 in the voltage regulatorwill become more positively biased so that the potential at itscollector and hence at the base of transistor 122 becomes more negative.This, in turn, will increase the conductivity of transistors 122 and 126so that the voltage developed across resistors 108 and 110 will increasein level to thereby increase the magnitude of the DC output signal VConversely, if the error signal V becomes more negative, then theopposite operation will result, whereupon the magnitude of the outputvoltage V will decrease in magnitude. 1

OPERATION During the operation of the tachometer system, referencepulses F are generated by the pulse generator PG at a frequency directlyrelated to the angular velocity of shaft S. Also, the voltage tofrequency converter VF provides signal pulses F at a frequencyproportional to the magnitude of the direct current output signal V,,.For purposes of description herein, each frequency pulse will beconsidered as a binary 1 signal, whereas the absence of a frequencypulse will be considered as a binary 0 signal. The signal pulses F andthe reference pulses F are compared by the phase comparator PC.

The phase comparator PC has two terminals of particular interest for thefollowing description of operation; to wit, output terminal Q1 andterminal Q of flipflop 50. The binary states at terminals Q1, Q includefour binary levels; to wit, 00, 01, 10 and 11. The four binary levelsare dependent upon the phase-frequency of the reference pulses F isgreater than that of the signal pulses F then the binary state atterminals Q1, Q oscillates from [,0 to 1,1 to l,0, etc. Each timeterminal 01 is at a binary I signal level, the signal is inverted byamplifier 80 so that a negative potential is applied to integrator 86.The output signal taken from the integrator will vary in an oppositedirection and, consequently, a more positive going error signal V isapplied to the voltage regulator VR. As discussed previously herein,when the error signal V becomes more positive, the direct current outputsignal V increases in magnitude. An increase in magnitude of the DCoutput signal V in turn, causes the frequency of the signal pulses P toincrease toward that of the reference pulses F If, on the other hand,the frequency of the signal pulses F is greater than that of thereference pulses F then the binary states at terminals Q1, Q willoscillate between the binary signal levels 0,0 to 0,1 to 0,0, etc. Eachtime the output terminal O1 is at a binary level, the integrator outputerror signal V will become more negative, causing voltage regulator VRto decrease the magnitude of the direct current output signal V, If thefrequencies of signal pulses F and reference pulses F are synchronized,then the binary states at terminals Q1, 0 will oscillate between binarysignal levels 01, to 1,0 to 0,], etc. Consequently, an average binaryweight will exist between binary signals levels 0,1 and 1,0 at terminalsQ1 and Q. If the average weight is binary signal level 0,] then this isindicative that the reference pulses F lag the signal pulses F by 3.14radians. Conversely, if the average weight obtained is a binary signallevel of l,0, then this is indicative that the reference pulses F leadthe signal pulses F by 3.14 radians.

Reference is now made to TABLE I:

TABLE I Pulse Condition Status T T Integrator No. Output F F 01 Q Q! Q I0 O 0 0 0 0 2 l 0 0 0 0 I 3 l 0 0 I I 0 4 I 0 I 0 l l 5 I 0 l l l l 6 OI I l l 0 7 0 l I 0 0 l 8 O I 0 I 0 O 9 0 I 0 0 0 0 The above table isin the form of a truth table showing, in part, the operation of thephase comparator PC for various conditions l through 9 of the referenceand signal pulses F and F The pulse status of the input pulses is giventogether with the corresponding binary status at terminals Q1 and Q. Thebinary states at these terminals are indicated twice, with the firstindication being at time T which is just prior to receipt of pulses andthen at time T which is the binary state after receipt of the pulses. Inaddition, TABLE I indicates for each condition 1 through 9 the status ofthe integrator output signal V as to whether the signal becomes morenegative or more positive in dependence upon the binary states listedunder the column T The initial condition I in TABLE I indicates a binary0 signal level for the pulses, as well as terminals 01 and Q. Incondition 2, it is assumed that frequency pulse F is present, but nosignal pulse F is present. In response to this condition the binarystate at terminals Q1 and Q will become a signal level of 0,1.Consequently, the

integrators output circuit carries a negative going signal to cause themagnitude of the DC output voltage V L to decrease. Reference may bemade to TABLE I for the binary states at terminals Q1, Q and theintegrator output signal for the conditions 3 through 9.

The output control signal V of the phase comparator PC is an alternatingvoltage having a DC component with the frequency of the alternatingvoltage being equal to that of the reference pulses F Integrator circuit86 removes the AC component and, as previously described herein,provides an error signal V,; which is either a negative-going orpositive-going signal for purposes of regulating the magnitude of the DCoutput voltage V Multiplier 82 is inserted ahead of the integrator inorder to provide a telescoping integrator time. constant. Thus, theoutput voltage of the integrator is roughly proportional to thefrequency of the phase comparator. However, by multiplying theintegrator output signal with the comparator output signal, theintegrator input voltage is accordingly adjusted. Consequently, for fastor high frequencies, the integrator output voltage will be high, sincethe multiplication of the integrator output voltage with the comparatoroutput voltage generates a large voltage for application to theintegrating circuit and thereby effectively creating a fast integrationtime constant. On the other hand, for slow or low frequency outputconditions of the comparator, the integrator output voltage is at a lowlevel, since the multiplication of the integrator output voltage withthe comparator output voltage generates a low voltage input to theintegrator to effectively lengthen the integrator time constant andthereby remove the low frequency AC components. Consequently, thistechnique of incorporating a multiplier ahead of the integrator circuitincreases the dynamic range by a minimum of one order of magnitude. Thetelescoping integrator TI continuously applies the error signal V E tothe voltage regulator throughout the operation of the tachometer systemso as to continuously regulate the direct current output signal V L sothat its magnitude is accurately representative of the tachometer speed.

Reference is now made to the illustration in FIG. 3 which presents, inblock diagram form, a simplified illustration of the embodimentdescribed thus far with reference to FIGS. 1 and 2. More specifically,the com trol circuit C, shown in FIG. 3, incorporates the phasecomparator PC, the telescoping integrator TI and the voltage tofrequency converter VF of FIG. 1. Briefly, the embodiment of FIGS. 1 and2 as summarized in the simplified illustration in FIG. 3, includes adirect current tachometer system having circuitry, such as a threephase, full wave rectifier R, for providing a DC output signal V whichhas a magnitude that varies with tachometer speed. Reference pulses areprovided, as with the pulse generator of FIG. 1, which exhibit afrequency proportional to the tachometer speed. The magnitude of the DCoutput signal is varied in dependence upon the frequency F of thereference pulses. Control circuit C functions as a frequency to voltageconverter since it provides a voltage signal V,; to the voltageregulator V R from the reference frequency pulses F Another aspect ofthis circuit, is the provision of the regulated power supply circuit PS.This circuit serves to provide the necessary B+ and B- operatingpotentials or bias voltages for the several active electronic circuitsemployed in the system. Thus, the circuit is self-powered in that noexternal batteries or the like are required. Instead, the outputpotential V taken from rectifier R is supplied to the regulated powersupply PS which, in turn, provides regulated 8+ and B- bias potentials.

ALTERNATIVE EMBODIMENTS Reference is now made to the embodiment of theinvention illustrated in FIG. 4. This embodiment of quite similar tothat illustrated and described hereinbefore with reference to FIGS. 1, 2and 3, and like components are identified in all Figures with likecharacter references. The embodiment of FIG. 4, like the embodimentdescribed hereinbefore, employs a voltage regulator VR which applies aDC output signal V,, to a load L. A control circuit C, like the controlcircuit C of FIG. 3, serves to receive the reference frequency pulses Fwhich exhibit a frequency proportional to the tachometer speed, anddevelop in dependence upon the frequency a control signal V The controlsignal V is applied to the voltage regulator VR to vary the magnitude ofthe DC output signal V in dependence upon the frequency of the referencepulses F The control circuit C of FIG. 4, however, differs from thepreviously described control circuit in that it employs a one shotmultivibrator circuit 200 which serves to provide a trigger pulse of afixed duration for each received frequency pulse F Each trigger pulse isused to trigger a field effect transistor 202 into conduction for a timeduration corresponding to that of the trigger pulse. Each time the fieldeffect transistor 202 is gated into conduction, it passes a signal of afixed magnitude, as taken from a Zener reference 204, to the inputcircuit ofa conventional active low pass filter 206. Consequently, theinput signals to the active low pass filter take the form of a train ofpulses at frequency F with each pulse having a fixed time duration asdetermined by the one shot multivibrator circuit 200 and with each pulsehaving a fixed magnitude for that time duration as determined by theZener reference 204. The output signal V,;' taken from the output of theactive low pass filter 206 will be a DC potential having a magnitudewhich varies in direct proportion to frequency F Signal V is applied tothe voltage regulator VR so as to vary the magnitude of the DC outputsignal V, in dependence upon frequency F in the same manner as describedhereinbefore with reference to the schematic circuit illustration of thevoltage regulator in FIG. 2.

Reference is now made to the embodiment of FIG. 5, which is quitesimilar to that illustrated and described hereinbefore with respect tothe embodiment of FIG. 4. Like components in both Figures are identifiedwith like character references to simplify the description of theinvention herein. The embodiment of FIG. 5 differs from the embodimentof FIG. 4 in that the control circuit C" employs refinements to theactive low pass filter to obtain improved accuracy whereby the outputvoltage V,, will follow the control voltage V but will not be limited inits range of values. Specifically, the control circuit C" is similar tothat of control circuit C in that it employs a one shot multivibratorcircuit 200, a field effect transistor 202, a Zener reference source204, and an active low pass filter 206. Additional filtering is providedby passive elements 208 and 210. These passive elements may each takethe form of, for example, a T-filter network. The passive elements 208and 210 are connected in common to a current summing point P leading tothe inverting input of an operational amplifier 212. It is the output ofthe operational amplifier that provides the control signal V which isapplied to the voltage regulator VR in the same sense as control signalV is applied to the voltage regulator in the embodiment of FIG. 4.However, the passive element 210 is connected in a negative feedbackpath from the output of the voltage regulator to the summing point P.Output voltage V is converted by the passive element 208 to a currentwhich is applied to the summing point P. In addition, output voltage Vtaken from the voltage regulator VR is converted by passive element 210into a proportional current and applied to the summing point P. Here thecurrents along with amplifier errors cancel so that the output voltage Vwill be more precisely representative of tachometer speed.

Although the invention has been described in conjunction with analternating current tachometer generator G and a three phase, full waverectifier R to obtain brushless tachometer operation, the invention isnot limited to same. Thus, if desired, the tachometer generator may takethe form of a conventional DC tachometer generator employing brushes andcommutators to provide an unregulated DC signal, such as potential V,which varies in magnitude with tachometer speed. The unregulated signalmay then be varied in dependence upon frequency pulses provided by thepulse generator PG in the manner described herein. Also, whereas thevoltage regulator VR is illustrated herein as being a series regulatorit is contemplated that the regulator may also take the form of a shuntregulator.

Whereas the invention has been described with reference to certainembodiments, it is to be appreciated that it is not limited to same asvarious modifications in addition to those described above may be madewithout departing from the spirit and scope of the invention as definedin the appended claims.

What is claimed is:

1. In a direct current tachometer system having an alternating currenttachometer generator and rectifying means for providing a DC outputsignal having a magnitude which varies with tachometer speed andcomprising:

means for providing signal pulses exhibiting a frequency proportional tothe magnitude of said DC output signal; means for providing referencepulses exhibiting a frequency proportional to said tachometer speedfandcontrol means for varying the magnitude of said DC output signal independence upon the frequency relationship of said reference pulses andsaid signal pulses.

2. In a direct current tachometer system as set forth in claim 1,wherein said control means includes'phase comparator circuit meansresponsive to said, reference and signal pulses for providing an outputsignal in respective dependence upon the phase relationship fbetweensaid pulses. :I'V

3. In a direct current tachometer systeni a s set forth in claim 1,wherein said control means iiiclud es pulse comparing means forcomparing said signal pulses and said reference pulses and providing acontrolsi 'gnal indicative that said pulses are not in syn 'ith eachother; and I output signal regulating means for varying thei'riagnitudeof said DC output signal in dependence upon said control signal.

4. In a direct current tachometer system as set forth in claim 3,including circuit means for applying said varied DC output signal tosaid signal pulse providing means for varying the frequency of saidsignal pulses.

5. In a direct current tachometer system as set forth in claim 4,including integrating circuit means interposed between said pulsecomparing means and said output signal regulating means for integratingsaid control signal and applying the integrated output thereof as anerror signal to said output signal regulating means which serves to varysaid DC output signal in accordance with said error signal.

6. In a direct current tachometer system as set forth in claim 5,including signal multiplying means for multiplying said control signalby said error signal and applying the multiplied signal to the input ofsaid integrating circuit means to effectively vary the integrating timeconstant of said integrator circuit means.

7. In a direct current tachometer system as set forth in claim 1,wherein said tachometer generator is a brushless permanent magnetgenerator having a rotatable shaft adapted to be connected to arotatable member for providing an AC output signal proportional to therotational speed of said rotatable member and said reference pulseproviding means includes transducer means for providing a fixed numberof said reference pulses for each revolution of said rotatable shaft andexhibiting a frequency dependent upon the angular velocity of saidrotatable shaft.

8. In a direct current tachometer system as set forth in claim 7,including a gear wheel mounted on said shaft and having a plurality ofgear teeth extending radially outward from the axis of rotation of saidshaft with said gear teeth being of substantially uniform size andspaced from each other by a substantially uniform distance, saidtransducer means being located in close proximity to said gear wheel forproviding a said output pulse for each gear tooth as said gear wheelcompletes one revolution.

9. In a direct current tachometer system as set forth in claim 8,wherein said transducer means includes a reluctance pulse transducer.

10. In a direct current tachometer system as set forth in claim 1,wherein said control means includes a phase locked servo loop controlmeans for continuously adjusting the magnitude of said DC output signaltoward that which would result in phase and frequency synchronouslyrelated reference pulses and signal pulses.

l I. In a direct current tachometer system as'set forth in claim 10,wherein said servo loop control means includes phase comparator meansfor providing an output control signal dependent on the phasedisplacement of said reference pulses and signal pulses.

12. In a direct current tachometer system as set forth in claim 11,wherein said servo loop control means includes integrating circuit meansfor integrating said output control signal and providing therefrom anerror signal and DC output signal regulating means for varying themagnitude of said DC output signal in dependence upon said error signal.

13. In a direct current tachometer system as set forth in claim 11,wherein said phase comparator means includes a two bit binary signalreversible counter circuit means having input circuits for receivingsaid signal pulses and reference pulses as binary signal pulse and anoutput circuit for carrying a binary signal.

14. In a direct current tachometer system having tachometer generatormeans for providing a DC output signal having a magnitude which varieswith tachometer speed and comprising:

means for providing reference pulses exhibiting a frequency proportionalto said tachometer speed; and control means for varying the magnitude ofsaid DC output signal in dependence upon the frequency of said referencepulses.

15. In a direct current tachometer system as set forth in claim 14wherein said control means includes active electronic means eachconnected to receive a DC bias potential, and power supply means forproviding said DC bias potential fonall of said active electronic meansfrom said DC output signal provided by said tachometer generator means.

16. In a direct current tachometer system as set forth in claim 14including means for providing signal pulses exhibiting a frequencyproportional to the magnitude of said DC output signal and wherein saidcontrol means includes circuit means for varying the magnitude of saidDC output signal in dependence upon the frequency relationship of saidreference pulses and said signal pulses.

17. In a direct current tachometer system as set forth in claim 14,including voltage regulator circuit means for receiving said DC outputsignal and having circuit means for providing a regulated said DC outputsignal in dependence upon the magnitudes of said DC output signal andsaid control signal.

18. In a direct current tachometer system as set forth in claim 17,wherein said control means and said voltage regulator circuit meansinclude active electronic circuit means for receiving bias potentials,and power supply means for receiving said DC output signal and providingbias potentials therefrom, and means for applying said bias potentialsto said active electronic circuit means.

19. In a direct current tachometer system as set forth in claim 17including a feedback circuit for applying said regulated DC outputsignal to said control means.

20. In a direct current tachometer system as set forth in claim 19,wherein said control means includes voltage to frequency converter meansfor providing a train of signal pulses having a frequency proportionalto said regulated DC output signal, and phase comparing means forproviding a control signal in dependence upon the phase relationship ofsaid reference pulses and said signal pulses.

21. In a direct current tachometer system as set forth in claim 19,wherein said control means includes frequency to voltage convertingmeans for developing a control signal having a magnitude proportional tothe frequency of said reference pulses, and amplifying circuit meansinterposed between said converting means and said voltage regulatormeans and having an input circuit connected to said feedback circuit.

22. In a direct current tachometer system as set forth in claim 21including bias voltage supply means for supplying bias voltages to allthe active electronic circuits thereof, said bias voltage supply meansbeing connected so as to supply said bias voltages only from elec-

1. In a direct current tachometer system having an alternating currenttachometer generator and rectifying means for providing a DC outputsignal having a magnitude which varies with tachometer speed andcomprising: means for providing signal pulses exhibiting a frequencyproportional to the magnitude of said DC output signal; means forproviding reference pulses exhibiting a frequency proportional to saidtachometer speed; and control means for varying the magnitude of said DCoutput signal in dependence upon the frequency relationship of saidreference pulses and said signal pulses.
 2. In a direct currenttachometer system as set forth in claim 1, wherein said control meansincludes phase comparator circuit means responsive to said reference andsignal pulses for providing an output signal in respective dependenceupon the phase relationship between said pulses.
 3. In a direct currenttachometer system as set forth in claim 1, wherein said control meansincludes pulse comparing means for comparing said signal pulses and saidreference pulses and providing a control signal indicative that saidpulses are not in synchronism with each other; and output signalregulating means for varying the magnitude of said DC output signal independence upon said control signal.
 4. In a direct current tachometersystem as set forth in claim 3, including circuit means for applyingsaid varied DC output signal to said signal pulse providing means forvarying the frequency of said signal pulses.
 5. In a direct currenttachometer system as set forth in claim 4, including integrating circuitmeans interposed between said pulse comparing means and said outputsignal regulating means for integrating said control signal and applyingthe integrated output thereof as an error signal to said output signalregulating means which serves to vary said DC output signal inaccordance with said error signal.
 6. In a direct current tachometersystem as set forth in claim 5, including signal multiplying means formultiplying said control signal by said error signal and applying themultiplied signal to the input of said integrating circuit means toeffectively vary the integrating time constant of said integratorcircuit means.
 7. In a direct current tachometer system as set forth inclaim 1, wherein said tachometer generator is a brushless permanentmagnet generator having a rotatable shaft adapted to be connected to arotatable member for providing an AC output signal proportional to therotational speed of said rotatable member and said reference pulseproviding means includes transducer means for providing a fixed numberof said reference pulses for each revolution of said rotatable shaft andexhibiting a frequency dependent upon the angular velocity of saidrotatable shaft.
 8. In a direct current tachometer system as set forthin claim 7, including a gear wheel mounted on said shaft and having aplurality of gear teeth extending radially outward from the axis ofrotation of said shaft with said gear teeth being of substantiallyuniform size and spaced from each other by a substantially uniformdistance, said transducer means being located in close proximity to saidgear wheel for providing a said output pulse for each gear tooth as saidgear wheel completes one revolution.
 9. In a direct current tachometersystem as set forth in claim 8, wherein said transducer means includes areluctance pulse transducer.
 10. In a direct current tachometer systemas set forth in claim 1, wherein said control means includes a phaselocked servo loop control means for continuously adjusting the magnitudeof said DC output signal toward that which would result in phase andfrequency synChronously related reference pulses and signal pulses. 11.In a direct current tachometer system as set forth in claim 10, whereinsaid servo loop control means includes phase comparator means forproviding an output control signal dependent on the phase displacementof said reference pulses and signal pulses.
 12. In a direct currenttachometer system as set forth in claim 11, wherein said servo loopcontrol means includes integrating circuit means for integrating saidoutput control signal and providing therefrom an error signal and DCoutput signal regulating means for varying the magnitude of said DCoutput signal in dependence upon said error signal.
 13. In a directcurrent tachometer system as set forth in claim 11, wherein said phasecomparator means includes a two bit binary signal reversible countercircuit means having input circuits for receiving said signal pulses andreference pulses as binary signal pulses and an output circuit forcarrying a binary signal.
 14. In a direct current tachometer systemhaving tachometer generator means for providing a DC output signalhaving a magnitude which varies with tachometer speed and comprising:means for providing reference pulses exhibiting a frequency proportionalto said tachometer speed; and control means for varying the magnitude ofsaid DC output signal in dependence upon the frequency of said referencepulses.
 15. In a direct current tachometer system as set forth in claim14 wherein said control means includes active electronic means eachconnected to receive a DC bias potential, and power supply means forproviding said DC bias potential for all of said active electronic meansfrom said DC output signal provided by said tachometer generator means.16. In a direct current tachometer system as set forth in claim 14including means for providing signal pulses exhibiting a frequencyproportional to the magnitude of said DC output signal and wherein saidcontrol means includes circuit means for varying the magnitude of saidDC output signal in dependence upon the frequency relationship of saidreference pulses and said signal pulses.
 17. In a direct currenttachometer system as set forth in claim 14, including voltage regulatorcircuit means for receiving said DC output signal and having circuitmeans for providing a regulated said DC output signal in dependence uponthe magnitudes of said DC output signal and said control signal.
 18. Ina direct current tachometer system as set forth in claim 17, whereinsaid control means and said voltage regulator circuit means includeactive electronic circuit means for receiving bias potentials, and powersupply means for receiving said DC output signal and providing biaspotentials therefrom, and means for applying said bias potentials tosaid active electronic circuit means.
 19. In a direct current tachometersystem as set forth in claim 17 including a feedback circuit forapplying said regulated DC output signal to said control means.
 20. In adirect current tachometer system as set forth in claim 19, wherein saidcontrol means includes voltage to frequency converter means forproviding a train of signal pulses having a frequency proportional tosaid regulated DC output signal, and phase comparing means for providinga control signal in dependence upon the phase relationship of saidreference pulses and said signal pulses.
 21. In a direct currenttachometer system as set forth in claim 19, wherein said control meansincludes frequency to voltage converting means for developing a controlsignal having a magnitude proportional to the frequency of saidreference pulses, and amplifying circuit means interposed between saidconverting means and said voltage regulator means and having an inputcircuit connected to said feedback circuit.
 22. In a direct currenttachometer system as set forth in claim 21 including bias voltage supplymeans for supplying bias voltages to all the active electronic circuitsthereof, said bias voltage supply means being connected so as to supplysaid bias voltages only from electrical energy provided by saidtachometer generator.